Sciweavers

979 search results - page 183 / 196
» Optimal instruction scheduling using integer programming
Sort
View
TON
2002
144views more  TON 2002»
13 years 8 months ago
Algorithms for provisioning virtual private networks in the hose model
Virtual Private Networks (VPNs) provide customers with predictable and secure network connections over a shared network. The recently proposed hose model for VPNs allows for great...
Amit Kumar, Rajeev Rastogi, Abraham Silberschatz, ...
ISCA
2003
IEEE
110views Hardware» more  ISCA 2003»
14 years 1 months ago
Guided Region Prefetching: A Cooperative Hardware/Software Approach
Despite large caches, main-memory access latencies still cause significant performance losses in many applications. Numerous hardware and software prefetching schemes tolerate th...
Zhenlin Wang, Doug Burger, Steven K. Reinhardt, Ka...
ISCA
1996
IEEE
99views Hardware» more  ISCA 1996»
14 years 22 days ago
Performance Comparison of ILP Machines with Cycle Time Evaluation
Many studies have investigated performance improvement through exploiting instruction-level parallelism (ILP) with a particular architecture. Unfortunately, these studies indicate...
Tetsuya Hara, Hideki Ando, Chikako Nakanishi, Masa...
TCSV
2010
13 years 3 months ago
Layered Wireless Video Multicast Using Relays
Wireless video multicast enables delivery of popular events to many mobile users in a bandwidth efficient manner. However, providing good and stable video quality to a large number...
Özgü Alay, Thanasis Korakis, Yao Wang, E...
DAC
2002
ACM
14 years 9 months ago
Scheduler-based DRAM energy management
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
Victor Delaluz, Anand Sivasubramaniam, Mahmut T. K...