Sciweavers

979 search results - page 89 / 196
» Optimal instruction scheduling using integer programming
Sort
View
ISCA
2003
IEEE
144views Hardware» more  ISCA 2003»
14 years 3 months ago
Half-Price Architecture
Current-generation microprocessors are designed to process instructions with one and two source operands at equal cost. Handling two source operands requires multiple ports for ea...
Ilhyun Kim, Mikko H. Lipasti
JNW
2006
98views more  JNW 2006»
13 years 10 months ago
Efficient Distributed Algorithm for RWA Using Path Protection
A number of Integer Linear Program (ILP) formulations for both static and dynamic lightpath allocation have been proposed, for the design of survivable WDM networks. However, such ...
Arunita Jaekel, Ying Chen
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
14 years 7 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
LCPC
2000
Springer
14 years 1 months ago
Improving Offset Assignment for Embedded Processors
Embedded systems consisting of the application program ROM, RAM, the embedded processor core, and any custom hardware on a single wafer are becoming increasingly common in applicat...
Sunil Atri, J. Ramanujam, Mahmut T. Kandemir
SC
1992
ACM
14 years 2 months ago
Optimal Tracing and Replay for Debugging Message-Passing Parallel Programs
A common debugging strategy involves reexecuting a program (on a given input) over and over, each time gaining more information about bugs. Such techniques can fail on message-pas...
Robert H. B. Netzer, Barton P. Miller