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LCPC
1998
Springer
13 years 12 months ago
Copy Elimination for Parallelizing Compilers
Techniques for aggressive optimization and parallelization of applications can have the side-effect of introducing copy instructions, register-to-register move instructions, into t...
David J. Kolson, Alexandru Nicolau, Nikil D. Dutt
CC
2004
Springer
14 years 1 months ago
Using Multiple Memory Access Instructions for Reducing Code Size
An important issue in embedded systems design is the size of programs. As computing devices decrease in size, yet with more and more functions, better code size optimizations are i...
Neil Johnson, Alan Mycroft
EMSOFT
2005
Springer
14 years 1 months ago
Using de-optimization to re-optimize code
The nature of embedded systems development places a great deal of importance on meeting strict requirements in areas such as static code size, power consumption, and execution tim...
Stephen Hines, Prasad Kulkarni, David B. Whalley, ...
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 1 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
DATE
2004
IEEE
122views Hardware» more  DATE 2004»
13 years 11 months ago
Phase Coupled Code Generation for DSPs Using a Genetic Algorithm
The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting special hardware features. Due to the irregular arc...
Markus Lorenz, Peter Marwedel