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ICCAD
2000
IEEE
99views Hardware» more  ICCAD 2000»
14 years 2 days ago
Potential Slack: An Effective Metric of Combinational Circuit Performance
This paper proposes the concept of potential slack and show it is an effective metric of combinational circuit performance. We provide several methods for estimating potential sla...
Chunhong Chen, Xiaojian Yang, Majid Sarrafzadeh
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 5 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
DAC
2005
ACM
14 years 8 months ago
A novel synthesis approach for active leakage power reduction using dynamic supply gating
: Due to exponential increase in subthreshold leakage with technology scaling and temperature increase, leakage power is becoming a major fraction of total power in the active mode...
Swarup Bhunia, Nilanjan Banerjee, Qikai Chen, Hami...
EUROGP
2000
Springer
116views Optimization» more  EUROGP 2000»
13 years 11 months ago
An Extrinsic Function-Level Evolvable Hardware Approach
1 The function level evolvable hardware approach to synthesize the combinational multiple-valued and binary logic functions is proposed in rst time. The new representation of logic...
Tatiana Kalganova
EUROGP
2004
Springer
135views Optimization» more  EUROGP 2004»
14 years 1 months ago
Reusing Code in Genetic Programming
Abstract. In this paper we propose an approach to Genetic Programming based on code reuse and we test it in the design of combinational logic circuits at the gate-level. The circui...
Edgar Galván López, Riccardo Poli, C...