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140
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FCCM
2004
IEEE
133views VLSI» more  FCCM 2004»
15 years 8 months ago
A Methodology for Synthesis of Efficient Intrusion Detection Systems on FPGAs
Intrusion detection for network security is a computation intensive application demanding high system performance. System level design, a relatively unexplored field in this area,...
Zachary K. Baker, Viktor K. Prasanna
JSAC
2008
117views more  JSAC 2008»
15 years 4 months ago
A design framework for limited feedback MIMO systems with zero-forcing DFE
Abstract--We consider the design of multiple-input multipleoutput communication systems with a linear precoder at the transmitter, zero-forcing decision feedback equalization (ZFDF...
Michael Botros Shenouda, Timothy N. Davidson
DAC
1999
ACM
16 years 5 months ago
Engineering Change: Methodology and Applications to Behavioral and System Synthesis
Due to the unavoidable need for system debugging, performance tuning, and adaptation to new standards, the engineering change (EC) methodology has emerged as one of the crucial co...
Darko Kirovski, Miodrag Potkonjak
DSD
2008
IEEE
94views Hardware» more  DSD 2008»
15 years 11 months ago
Mapping a Fault-Tolerant Distributed Algorithm to Systems on Chip
Systems on chip (SoC) have much in common with traditional (networked) distributed systems in that they consist of largely independent components with dedicated communication inte...
Gottfried Fuchs, Matthias Függer, Ulrich Schm...
136
Voted
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
15 years 10 months ago
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems
— This paper presents an architecture and a wrapper synthesis approach for the design of multi-clock systems-on-chips. We build upon the initial work on multi-clock latency-insen...
Ankur Agiwal, Montek Singh