Sciweavers

104 search results - page 17 / 21
» Optimization of Industrial Applications with Hardware in the...
Sort
View
ACSD
2005
IEEE
90views Hardware» more  ACSD 2005»
14 years 1 months ago
Extensible and Scalable Time Triggered Scheduling
The objective of this paper is to present how to design a system that can accommodate additional functionality with either no changes to the design or adding architectural modules...
Wei Zheng, Jike Chong, Claudio Pinello, Sri Kanaja...
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
13 years 11 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...
ASPDAC
2009
ACM
155views Hardware» more  ASPDAC 2009»
14 years 1 months ago
Variation-aware resource sharing and binding in behavioral synthesis
— As technology scales, the delay uncertainty caused by process variations has become increasingly pronounced in deep submicron designs. In the presence of process variations, wo...
Feng Wang 0004, Yuan Xie, Andres Takach
DATE
2010
IEEE
105views Hardware» more  DATE 2010»
14 years 15 days ago
Modeling constructs and kernel for parallel simulation of accuracy adaptive TLMs
Abstract—We present a set of modeling constructs accompanied by a high performance simulation kernel for accuracy adaptive transaction level models. In contrast to traditional, ...
Rauf Salimi Khaligh, Martin Radetzki
IPPS
2006
IEEE
14 years 1 months ago
On the impact of data input sets on statistical compiler tuning
In recent years, several approaches have been proposed to use profile information in compiler optimization. This profile information can be used at the source level to guide loo...
Masayo Haneda, Peter M. W. Knijnenburg, Harry A. G...