208 search results - page 29 / 42 » Optimization of a Retargetable Functional Simulator for Embe... |
LCTRTS
2001
Springer
13 years 12 months ago
2001
Springer
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
MICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
MICRO
2006
IEEE
14 years 1 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
AUTOMATICA
2008
13 years 7 months ago
2008
This paper studies a general dynamic buffer management problem with one buffer inserted between two interacting components. The component to be controlled is assumed to have multi...
CC
2008
Springer
13 years 9 months ago
2008
Springer
The polyhedral model provides powerful abstractions to optimize loop nests with regular accesses. Affine transformations in this model capture a complex sequence of execution-reord...