208 search results - page 6 / 42 » Optimization of a Retargetable Functional Simulator for Embe... |
FPL
2006
Springer
13 years 11 months ago
2006
Springer
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an arch...
ESTIMEDIA
2009
Springer
13 years 5 months ago
2009
Springer
Abstract--Memory accesses are a major cause of energy consumption for embedded systems and the stack is a frequent target for data accesses. This paper presents a fully software te...
SAMOS
2010
Springer
13 years 5 months ago
2010
Springer
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
In this paper, a new timing generation method is proposed for the performance analysis of embedded software. The time stamp generation of I/O accesses is crucial to performance es...
ISSS
2002
IEEE
14 years 11 days ago
2002
IEEE
This paper presents a new technique for global energy optimization through coordinated functional partitioning and speed selection for embedded processors interconnected by a high...