66 search results - page 6 / 14 » Optimization of critical paths in circuits with level-sensit... |
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
For a variety of signal processing applications polynomials are implemented in circuits. Recent work on polynomial datapath optimization achieved significant reductions of hardware...
EAAI
2007
13 years 7 months ago
2007
This paper presents a swarm intelligence based approach to optimally partition combinational CMOS circuits for pseudoexhaustive testing. The partitioning algorithm ensures reducti...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
Conventional high-level synthesis uses the worst case delay to relate all inputs to all outputs of an operation. This is a very conservative approximation of reality, especially i...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
Abstract-- Digital designs can be mapped to different implementations using diverse approaches, with varying cost criteria. Post-processing transforms, such as transistor sizing ca...
ICCAD
1993
IEEE
13 years 11 months ago
1993
IEEE
Circuit simulation is one of the most computationally expensive tasks in circuit design and optimization. Detailed simulation at the level of precision of SPICE is usually perform...