140 search results - page 10 / 28 » Optimization of high-performance superscalar architectures f... |
DATE
2003
IEEE
14 years 20 days ago
2003
IEEE
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
TVLSI
2008
13 years 7 months ago
2008
Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an efficient ratio of performance to energy-c...
CONEXT
2009
ACM
13 years 8 months ago
2009
ACM
We consider the problem of providing ubiquitous yet affordable Internet connectivity to devices at home, at work, and on the move. In this context, we take advantage of two signif...
DAC
2002
ACM
14 years 8 months ago
2002
ACM
Aim of this paper is to propose a methodology for the definition of an instruction-level energy estimation framework for VLIW (Very Long Instruction Word) processors. The power mo...
ETS
2007
IEEE
13 years 9 months ago
2007
IEEE
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...