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CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Arbitrary memory dependencies and variable latency memory systems are major obstacles to the synthesis of large-scale ASIC systems in high-level synthesis. This paper presents SOM...
ICS
2009
Tsinghua U.
14 years 2 months ago
2009
Tsinghua U.
Tiling is a crucial loop transformation for generating high performance code on modern architectures. Efficient generation of multilevel tiled code is essential for maximizing da...
ICRA
1999
IEEE
13 years 12 months ago
1999
IEEE
We consider the problem of automatically generating viewpoint motions for a virtual camera tracking a moving target. Given the target's trajectory, we plan the motion of a ca...
GECCO
2009
Springer
13 years 5 months ago
2009
Springer
We describe the first steps in the adoption of Shape Grammars with Grammatical Evolution for application in Evolutionary Design. Combining the concepts of Shape Grammars and Genet...
PLDI
1995
ACM
13 years 11 months ago
1995
ACM
DSP architectures typically provide indirect addressing modes with auto-increment and decrement. In addition, indexing mode is not available, and there are usually few, if any, ge...