92 search results - page 11 / 19 » Optimization of shield structures in analog integrated circu... |
SLIP
2003
ACM
14 years 26 days ago
2003
ACM
Aggressive process scaling and increasing clock rates have made crosstalk noise an important issue in VLSI design. Switching on adjacent wires on long bus lines can increase delay...
ICCAD
1995
IEEE
13 years 11 months ago
1995
IEEE
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
TCAD
1998
13 years 7 months ago
1998
—A new approach to optimize multilevel logic circuits is introduced. Given a multilevel circuit, the synthesis method optimizes its area while simultaneously enhancing its random...
ISCAS
2005
IEEE
14 years 1 months ago
2005
IEEE
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steadystate thermal analysis. This paper presents the first ...