92 search results - page 5 / 19 » Optimization of shield structures in analog integrated circu... |
ICCAD
1999
IEEE
13 years 12 months ago
1999
IEEE
In this paper, we propose a new robust approach to signal backtrace for efficiently testing embedded analog modules in a large system. The proposed signal backtrace method is form...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
ISCAS
2003
IEEE
14 years 27 days ago
2003
IEEE
We present a low-power analog circuit for implementing a model of a leaky integrate and fire neuron. Next to being optimized for low-power consumption, the proposed circuit inclu...
DAC
2003
ACM
14 years 26 days ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
ASPDAC
2006
ACM
14 years 1 months ago
2006
ACM
This paper advances a new methodology based on signal-path information to resolve the problem of device-level placement for analog layout. This methodology is mainly based on three...