65 search results - page 4 / 13 » Optimizations on Array Skeletons in a Shared Memory Environm... |
DATE
2000
IEEE
14 years 1 months ago
2000
IEEE
There has been a proliferation of block-diagram environments for specifying and prototyping DSP systems. These include tools from academia like Ptolemy [3], and GRAPE [7], and com...
ICCD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Heterogeneous Chip Multiprocessors (HMPs), such as the Cell Broadband Engine, offer a new design optimization opportunity by allowing designers to provide accelerators for appl...
CLUSTER
2008
IEEE
13 years 10 months ago
2008
IEEE
Efficient intra-node shared memory communication is important for High Performance Computing (HPC), especially with the emergence of multi-core architectures. As clusters continue ...
IPPS
1999
IEEE
14 years 27 days ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
VLSID
2002
IEEE
14 years 1 months ago
2002
IEEE
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...