Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
— The influence of interconnects on processor performance and cost is becoming increasingly pronounced with technology scaling. In this paper, we present a fast compression sche...
Jiangjiang Liu, Krishnan Sundaresan, Nihar R. Maha...
In this paper we present an algorithmic framework for solving a class of combinatorial optimization problems on graphs with bounded pathwidth. The problems are NP-hard in general, ...
With the emerging of 10 Gbps Ethernet, modern storage networks allow the hosts to access remote cache nearly as quickly as they can access from their local storages. Aiming at imp...