868 search results - page 3 / 174 » Optimizing Logic Design Using Boolean Transforms |
GLVLSI
2009
IEEE
14 years 2 months ago
2009
IEEE
Logic decomposition has been extensively used to optimize the worst-case delay and the area in the technology independent phase. Bi-decomposition is one of the state-of-art techni...
ASPDAC
2008
ACM
13 years 8 months ago
2008
ACM
—In this paper we describe a practical methodology to formally verify highly optimized, industrial multipliers. We a multiplier description language which abstracts from low-leve...
INFOCOM
2012
IEEE
11 years 10 months ago
2012
IEEE
Packet classification is one of the major challenges in designing high-speed routers and firewalls as it involves sophisticated multi-dimensional searching. Ternary Content Address...
ISMVL
2007
IEEE
14 years 1 months ago
2007
IEEE
We generalize the binary Deutsch-Jozsa algorithm to nvalued logic using the quantum Fourier transform. Our algorithm is not only able to distinguish between constant and balanced ...
ETS
2010
IEEE
13 years 8 months ago
2010
IEEE
It was shown in the past that ATPG based on the Boolean Satisfiability problem is a beneficial complement to traditional ATPG techniques. Its advantages can be observed especially ...