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» Optimizing Power Consumption in Large Scale Storage Systems
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ISCAS
2005
IEEE
183views Hardware» more  ISCAS 2005»
14 years 1 months ago
Battery-aware dynamic voltage scaling in multiprocessor embedded system
— In a battery powered system, a primary design consideration is the battery lifetime. Profile of current drawn from a battery determines its lifetime. Recently in [4] dynamic v...
Yuan Cai, Sudhakar M. Reddy, Irith Pomeranz, Bashi...
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
14 years 22 days ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 12 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...
ICCS
2007
Springer
14 years 1 months ago
Implementing Virtual Buffer for Electric Power Grids
The electric power grid is a vital network for every aspect of our life. The lack of buffer between generation and consumption makes the power grid unstable and fragile. While larg...
Rong Gao, Lefteri H. Tsoukalas
FAST
2011
12 years 11 months ago
Cost Effective Storage using Extent Based Dynamic Tiering
Multi-tier systems that combine SSDs with SAS/FC and/or SATA disks mitigate the capital cost burden of SSDs, while benefiting from their superior I/O performance per unit cost an...
Jorge Guerra, Himabindu Pucha, Joseph S. Glider, W...