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FPGA
2007
ACM
185views FPGA» more  FPGA 2007»
16 years 8 days ago
Power-aware FPGA logic synthesis using binary decision diagrams
Power consumption in field programmable gate arrays (FPGAs) has become an important issue as the FPGA market has grown to include mobile platforms. In this work we present a power...
Kevin Oo Tinmaung, David Howland, Russell Tessier
169
Voted
FCCM
2006
IEEE
107views VLSI» more  FCCM 2006»
16 years 5 days ago
Hardware/Software Integration for FPGA-based All-Pairs Shortest-Paths
Field-Programmable Gate Arrays (FPGAs) are being employed in high performance computing systems owing to their potential to accelerate a wide variety of long-running routines. Par...
Uday Bondhugula, Ananth Devulapalli, James Dinan, ...
ICMCS
2006
IEEE
105views Multimedia» more  ICMCS 2006»
16 years 4 days ago
Embedded Convolutional Face Finder
In this paper, a high-level optimization methodology is applied for the implementation of the well-known Convolutional Face Finder (CFF) algorithm for real-time applications on ce...
Sébastien Roux, Franck Mamalet, Christophe ...
148
Voted
VTC
2006
IEEE
117views Communications» more  VTC 2006»
16 years 3 days ago
Simulation of Throughput in UMTS Networks with Different Spreading Factors
— We design and implement a local session1 admission control (SAC) algorithm for third-generation wireless networks which allows for the simulation of network throughput for diff...
Robert Akl, Anurag Arepally
ICPADS
2005
IEEE
15 years 11 months ago
Efficient Distributed QoS Routing Protocol for MPLS Networks
- This paper proposes a new distributed QoS routing protocol, called Efficient Distributed QoS Routing (EDQR), for MPLS networks. The path searching algorithm of EDQR considers an ...
Man-Ching Yuen, Weijia Jia, Chi-Chung Cheung