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1912
search results - page 16 / 383
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Optimizing interconnection policies
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ICCAD
1996
IEEE
106
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Hardware
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ICCAD 1996
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Buffered Steiner tree construction with wire sizing for interconnect layout optimization
14 years 1 months ago
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www.cs.ucr.edu
Takumi Okamoto, Jason Cong
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25
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ISCAS
1993
IEEE
77
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ISCAS 1993
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Generalized Delay Optimization of Resistive Interconnections through an Extension of Logical Effort
14 years 1 months ago
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www.suryatech.com
Kumar Venkat
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18
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ICCAD
1995
IEEE
77
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ICCAD 1995
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Optimal wiresizing for interconnects with multiple sources
14 years 22 days ago
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cadlab.cs.ucla.edu
Jason Cong, Lei He
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33
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NOCS
2010
IEEE
115
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Computer Networks
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NOCS 2010
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Photonic Chip-Scale Interconnection Networks for Performance-Energy Optimized Computing
13 years 7 months ago
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Keren Bergman
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29
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TPDS
2010
84
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TPDS 2010
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Communication Requirements and Interconnect Optimization for High-End Scientific Applications
13 years 7 months ago
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bebop.cs.berkeley.edu
Shoaib Kamil, Leonid Oliker, Ali Pinar, John Shalf
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