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» Optimizing interconnection policies
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CCS
2005
ACM
14 years 2 months ago
CPOL: high-performance policy evaluation
Policy enforcement is an integral part of many applications. Policies are often used to control access to sensitive information. Current policy specification languages give users ...
Kevin Borders, Xin Zhao, Atul Prakash
VLSID
2002
IEEE
109views VLSI» more  VLSID 2002»
14 years 9 months ago
Probabilistic Analysis of Rectilinear Steiner Trees
Steiner tree is a fundamental problem in the automatic interconnect optimization for VLSI design. We present a probabilistic analysis method for constructing rectilinear Steiner t...
Chunhong Chen
ISPD
1997
ACM
110views Hardware» more  ISPD 1997»
14 years 1 months ago
Performance driven global routing for standard cell design
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
Jason Cong, Patrick H. Madden
ASPDAC
2007
ACM
100views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning
- For modern processor designs in nanometer technologies, both block and interconnect pipelining are needed to achieve multi-gigahertz clock frequency, but previous approaches cons...
Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong,...
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 9 months ago
Efficient Macromodeling for On-Chip Interconnects
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
Qinwei Xu, Pinaki Mazumder