2703 search results - page 189 / 541 » Optimizing memory transactions |
153
Voted
DAC
1999
ACM
16 years 3 months ago
1999
ACM
In embedded system design, the designer has to choose an onchip memory configuration that is suitable for a specific application. To aid in this design choice, we present a memory...
103
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DATE
2009
IEEE
15 years 9 months ago
2009
IEEE
Violations in memory references cause tremendous loss of productivity, catastrophic mission failures, loss of privacy and security, and much more. Software mechanisms to detect me...
109
Voted
DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that the SPM is assigned a fixed address space. The main target objects to be placed o...
110
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ICS
2003
Tsinghua U.
15 years 7 months ago
2003
Tsinghua U.
—The ever-increasing computational power of contemporary microprocessors reduces the execution time spent on arithmetic computations (i.e., the computations not involving slow me...
149
click to vote
DAC
2009
ACM
15 years 7 months ago
2009
ACM
Dynamic binary translation (DBT) can be used to address important issues in embedded systems. DBT systems store translated code in a software-managed code cache. Unlike general-pu...