2703 search results - page 84 / 541 » Optimizing memory transactions |
IPPS
1999
IEEE
14 years 1 months ago
1999
IEEE
In order to extract high levels of performance from modern parallel architectures, the effective management of deep memory hierarchies is very important. While architectural advan...
PLDI
2010
ACM
14 years 1 months ago
2010
ACM
This paper presents a novel optimizing compiler for general purpose computation on graphics processing units (GPGPU). It addresses two major challenges of developing high performa...
EMSOFT
2007
Springer
14 years 3 months ago
2007
Springer
Flash memory has many merits such as light weight, shock resistance, and low power consumption, but also has limitations like the erase-before-write property. To overcome such lim...
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
HPCA
2005
IEEE
14 years 9 months ago
2005
IEEE
Memory system optimizations have been well studied on single-threaded systems; however, the wide use of simultaneous multithreading (SMT) techniques raises questions over their ef...