This paper describes several methods for improving the scalability of memory disambiguation hardware for future high ILP processors. As the number of in-flight instructions grows...
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
In this paper, we propose an iteration-free algorithm to find the optimal configuration, including transmit power and source coding rates, to maximize the lifetime of a cluster ...
The buck converter is one of DC/DC converters that are often used as power supplies. This paper presents parameter tuning methods to obtain circuit element values for the buck conv...
—Connecting system-level performance models with circuit information has been a long-standing problem in analog/mixed-signal front-ends, like radios and high-speed links. High-sp...