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ISCAS
2006
IEEE
119views Hardware» more  ISCAS 2006»
14 years 2 months ago
Scheduling and binding for low gate leakage nanoCMOS datapath circuit synthesis
In this paper we present two polynomial time-complexity heuristic algorithms for optimization of gate-oxide leakage (tunneling current) during behavioral synthesis through simulta...
Saraju P. Mohanty, Elias Kougianos, Ramakrishna Ve...
ISCAS
2005
IEEE
164views Hardware» more  ISCAS 2005»
14 years 1 months ago
A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardware
—A triangle setup engine (TSE) generates setup parameters for rasterization in 3D graphics hardware. Since the TSE must be flexible for various embedded systems, a programmable T...
Kyusik Chung, Donghyun Kim, Lee-Sup Kim
DATE
2010
IEEE
183views Hardware» more  DATE 2010»
14 years 1 months ago
Monolithically stackable hybrid FPGA
— The paper introduces novel field programmable gate array (FPGA) circuits based on hybrid CMOS/resistive switching device (memristor) technology and explores several logic archi...
Dmitri Strukov, Alan Mishchenko
EUROGP
1999
Springer
166views Optimization» more  EUROGP 1999»
14 years 11 days ago
Adapting the Fitness Function in GP for Data Mining
In this paper we describe how the Stepwise Adaptation of Weights (saw) technique can be applied in genetic programming. The saw-ing mechanism has been originally developed for and ...
Jeroen Eggermont, A. E. Eiben, Jano I. van Hemert
GECCO
2000
Springer
225views Optimization» more  GECCO 2000»
13 years 11 months ago
Solving Large Binary Quadratic Programming Problems by Effective Genetic Local Search Algorithm
A genetic local search (GLS) algorithm, which is a combination technique of genetic algorithm and local search, for the unconstrained binary quadratic programming problem (BQP) is...
Kengo Katayama, Masafumi Tani, Hiroyuki Narihisa