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» Optimizing pipelines for power and performance
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JUCS
2006
112views more  JUCS 2006»
13 years 7 months ago
A Multi-objective Genetic Approach to Mapping Problem on Network-on-Chip
Abstract: Advances in technology now make it possible to integrate hundreds of cores (e.g. general or special purpose processors, embedded memories, application specific components...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
MOBIHOC
2007
ACM
14 years 7 months ago
Cross-layer latency minimization in wireless networks with SINR constraints
Recently, there has been substantial interest in the design of crosslayer protocols for wireless networks. These protocols optimize certain performance metric(s) of interest (e.g....
Deepti Chafekar, V. S. Anil Kumar, Madhav V. Marat...
IOPADS
1996
100views more  IOPADS 1996»
13 years 9 months ago
ENWRICH a Compute-Processor Write Caching Scheme for Parallel File Systems
Many parallel scientific applications need high-performance I/O. Unfortunately, end-to-end parallel-I/O performance has not been able to keep up with substantial improvements in p...
Apratim Purakayastha, Carla Schlatter Ellis, David...
ASPLOS
2010
ACM
14 years 2 months ago
COMPASS: a programmable data prefetcher using idle GPU shaders
A traditional fixed-function graphics accelerator has evolved into a programmable general-purpose graphics processing unit over the last few years. These powerful computing cores...
Dong Hyuk Woo, Hsien-Hsin S. Lee
CVPR
2008
IEEE
14 years 10 months ago
Beyond sliding windows: Object localization by efficient subwindow search
Most successful object recognition systems rely on binary classification, deciding only if an object is present or not, but not providing information on the actual object location...
Christoph H. Lampert, Matthew B. Blaschko, Thomas ...