954 search results - page 80 / 191 » Optimizing power and performance for reliable on-chip networ... |
ISPD
2006
ACM
14 years 3 months ago
2006
ACM
In this paper, we propose more accurate power/ground network circuit model, which consider both via and ground bounce effects to improve the performance estimation accuracy of on-...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
Sensor network processors and their applications are a growing area of focus in computer system research and design. Inherent to this design space is a reduced processing performa...
GLOBECOM
2007
IEEE
14 years 3 months ago
2007
IEEE
—In wireless relay networks, noise at the relays can be correlated possibly due to common interference or noise propagation from preceding hops. In this work we consider a parall...
DBISP2P
2005
Springer
14 years 2 months ago
2005
Springer
In this work we address the issue of efficient processing of range queries in DHT-based P2P data networks. The novelty of the proposed approach lies on architectures, algorithms, ...
MICRO
2008
IEEE
14 years 3 months ago
2008
IEEE
Any architectural optimization aims at satisfying the end user. However, modern architectures execute with little to no knowledge about the individual user. If architectures could...