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DATE
2010
IEEE
146views Hardware» more  DATE 2010»
14 years 3 months ago
Leveraging application-level requirements in the design of a NoC for a 4G SoC - a case study
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
Rudy Beraha, Isask'har Walter, Israel Cidon, Avino...
TCAD
2008
102views more  TCAD 2008»
13 years 10 months ago
Quantum Circuit Simplification and Level Compaction
Abstract--Quantum circuits are time-dependent diagrams describing the process of quantum computation. Usually, a quantum algorithm must be mapped into a quantum circuit. Optimal sy...
Dmitri Maslov, Gerhard W. Dueck, D. Michael Miller...
ICCAD
2004
IEEE
155views Hardware» more  ICCAD 2004»
14 years 7 months ago
A flexibility aware budgeting for hierarchical flow timing closure
—In this paper, we present a new block budgeting algorithm which speeds up timing closure in timing driven hierarchical flows. After a brief description of the addressed flow, ...
Olivier Omedes, Michel Robert, Mohammed Ramdani
PAMI
2007
159views more  PAMI 2007»
13 years 10 months ago
Soft Color Segmentation and Its Applications
—We propose an automatic approach to soft color segmentation, which produces soft color segments with an appropriate amount of overlapping and transparency essential to synthesiz...
Yu-Wing Tai, Jiaya Jia, Chi-Keung Tang
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
14 years 5 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...