867 search results - page 16 / 174 » Optimizing synthesis with metasketches |
DAC
1996
ACM
14 years 1 months ago
1996
ACM
Recent trends in the semiconductor industry have resulted in an increasing demand for low power circuits. POSE is a step in providing the EDA community and academia with an enviro...
ICCAD
2007
IEEE
2007
IEEE
Optimal polynomial-time interprocedural register allocation for high-level synthesis and ASIP design
14 years 6 months ago
—Register allocation, in high-level synthesis and ASIP design, is the process of determining the number of registers to include in the resulting circuit or processor. The goal is...
ISCAS
2005
IEEE
14 years 3 months ago
2005
IEEE
Abstract— In this paper, we propose a sub-operation parallelism optimization algorithm in SIMD processor synthesis. Given an initial assembly code and timing constraints, our alg...
CCE
2008
13 years 9 months ago
2008
The problem of optimal synthesis of an integrated water system is addressed in this work, where water using processes and water treatment operations are combined into a single net...
SASP
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—One of the ways that custom instruction set extensions can improve over software execution is through the use of hardware structures that have been optimized at the arit...