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TCAD
2010
124views more  TCAD 2010»
13 years 1 months ago
A Reconfigurable Source-Synchronous On-Chip Network for GALS Many-Core Platforms
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
Anh Thien Tran, Dean Nguyen Truong, Bevan M. Baas
ASAP
1997
IEEE
92views Hardware» more  ASAP 1997»
13 years 10 months ago
Optimized software synthesis for synchronous dataflow
This paper reviews a set of techniques for compiling dataflow-based, graphical programs for embedded signal processing applications into efficient implementations on programmable ...
Shuvra S. Bhattacharyya, Praveen K. Murthy, Edward...
ICCAD
2001
IEEE
163views Hardware» more  ICCAD 2001»
14 years 3 months ago
Predicting the Performance of Synchronous Discrete Event Simulation Systems
In this paper we propose a model to predict the performance of synchronous discrete event simulation. The model considers parameters including the number of active objects per cyc...
Jinsheng Xu, Moon-Jung Chung
PADS
2004
ACM
14 years 4 days ago
Optimizing Parallel Execution of Detailed Wireless Network Simulation
With Parallel and Discrete Event Simulation (PDES) techniques, the runtime performance of detailed wireless network simulation can be improved significantly without compromising ...
Zhengrong Ji, Junlan Zhou, Mineo Takai, Jay Martin...
LCTRTS
2005
Springer
14 years 6 days ago
Cache aware optimization of stream programs
Effective use of the memory hierarchy is critical for achieving high performance on embedded systems. We focus on the class of streaming applications, which is increasingly preval...
Janis Sermulins, William Thies, Rodric M. Rabbah, ...