1990 search results - page 81 / 398 » Optimizing the Instruction Cache Performance of the Operatin... |
123
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DAC
2008
ACM
16 years 4 months ago
2008
ACM
With the growing number of programmable processing elements in today's MultiProcessor System-on-Chip (MPSoC) designs, the synergy required for the development of the hardware...
115
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USENIX
2008
15 years 5 months ago
2008
The performance of receive side TCP processing has traditionally been dominated by the cost of the `per-byte' operations, such as data copying and checksumming. We show that ...
128
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INFOCOM
2003
IEEE
15 years 8 months ago
2003
IEEE
—On-demand routing reduces the control overhead in mobile ad hoc networks, but it has the major drawback of introducing latency between route-request arrival and the determinatio...
109
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CLUSTER
2002
IEEE
15 years 8 months ago
2002
IEEE
With applications becoming larger and the increasing load on high performance systems, it is important to tackle the I/O bottleneck problem from several angles. It is not only ess...
130
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ASPDAC
1998
ACM
15 years 7 months ago
1998
ACM
We developed a new modular synthesis approach for design of low-power core-based data-intensive application-specific systems on silicon. The power optimization is conducted in th...