59 search results - page 5 / 12 » Optimizing the Reliability of Pipelined Applications under T... |
DAC
1996
ACM
14 years 1 months ago
1996
ACM
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
CORR
2008
Springer
13 years 9 months ago
2008
Springer
Abstract--We consider power control in cognitive radio networks where secondary users identify and exploit instantaneous and local spectrum opportunities without causing unacceptab...
VLSID
2007
IEEE
14 years 9 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
— A novel wave-pipelined global interconnect system is developed for reliable, high throughput, on-chip data communication. We argue that because there is only a single signal pr...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
Efficient high level design tools that can map behavioral descriptions to FPGA architectures are one of the key requirements to fully leverage FPGA for high throughput computatio...