337 search results - page 1 / 68 » Optimizing yield in global routing |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
We present the first efficient approach to global routing that takes spacing-dependent costs into account and provably finds a near-optimum solution including these costs. We sh...
TCAD
2008
13 years 7 months ago
2008
Abstract--In this paper, we propose track routing and optimization for yield (TROY), the first track router for the optimization of yield loss due to random defects. As the probabi...
ASPDAC
2009
ACM
13 years 11 months ago
2009
ACM
The number of vias generated during the global routing stage is a critical factor for the yield of final circuits. However, most global routers only approach the problem by chargin...
ASAP
2005
IEEE
14 years 1 months ago
2005
IEEE
CAD tools have become more and more important for integrated circuit (IC) design since a complicated system can be designed into a single chip, called system-on-a-chip (SOC), in w...
ASPDAC
2005
ACM
13 years 9 months ago
2005
ACM
- Redundant via insertion is a good solution to reduce the yield loss by via failure. However, the existing methods are all post-layout optimizations that insert redundant via afte...