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DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 2 months ago
Value-based bit ordering for energy optimization of on-chip global signal buses
In this paper, we present a technique that exploits the statistical behavior of data values transmitted on global signal buses to determine an energy-efficient ordering of bits t...
Krishnan Sundaresan, Nihar R. Mahapatra
ASPDAC
2007
ACM
108views Hardware» more  ASPDAC 2007»
14 years 3 days ago
Reduced-Order Wide-Band Interconnect Model Realization using Filter-Based Spline Interpolation
In the paper, we develop a systematic methodology for modeling sampled interconnect frequency response data based on spline interpolation. Through piecewise polynomial interpolatio...
Arthur Nieuwoudt, Mehboob Alam, Yehia Massoud
FORTE
2003
13 years 9 months ago
Concerning the Ordering of Adaptive Test Sequences
Abstract. The testing of a state-based system may involve the application of a number of adaptive test sequences. Where the implementation under test (IUT) is deterministic, the re...
Robert M. Hierons, Hasan Ural
AIPS
1994
13 years 9 months ago
Design Tradeoffs in Partial Order (Plan space) Planning
Despite the long history of classical planning, there has been very little comparative analysis of the performance tradeoffs offered by the multitude of existing planning algorith...
Subbarao Kambhampati
ICEC
1994
68views more  ICEC 1994»
13 years 9 months ago
Extended Forking Genetic Algorithm for Order Representation (O-FGA)
There are two types of GAs with difference of their representation of strings. They are the binary coded GA and the order-based GA. We've already proposed a new type of binar...
Shigeyoshi Tsutsui, Yoshiji Fujimoto, Isao Hayashi