Abstract−Several high performance LDPC codes have paritycheck matrices composed of permutation submatrices. We design a parallel-serial architecture to map the decoder of any str...
In this paper we design block-structured LDPC codes for iterative MIMO receivers with soft sphere detection in particular channel environments. The receiver EXIT charts are used a...
Abstract--An iterative decoding threshold analysis for terminated regular LDPC convolutional (LDPCC) codes is presented. Using density evolution techniques, the convergence behavio...
Michael Lentmaier, Arvind Sridharan, Daniel J. Cos...
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
Xiaoheng Chen, Jingyu Kang, Shu Lin, Venkatesh Ake...
Abstract— We analyze the decoding algorithm for regular timeinvariant LDPC convolutional codes as a 3D signal processing scheme and derive several parallelization concepts, which...