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» Overview on Low Power SoC Design Technology
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ISLPED
1996
ACM
121views Hardware» more  ISLPED 1996»
13 years 11 months ago
A low power high performance switched-current multiplier
This paper presents an accurate switched-current multiplier, designed for 3.3V supply voltage, performing 0.625M multiplications per second with a maximum nonlinearity of 0.94%. Th...
Domine Leenaerts, G. H. M. Joordens, Johannes A. H...
ICCAD
2003
IEEE
111views Hardware» more  ICCAD 2003»
14 years 4 months ago
Formal Methods for Dynamic Power Management
Dynamic Power Management or DPM refers to the problem of judicious application of various low power techniques based on runtime conditions in an embedded system to minimize the to...
Rajesh K. Gupta, Sandy Irani, Sandeep K. Shukla
ISVLSI
2007
IEEE
185views VLSI» more  ISVLSI 2007»
14 years 1 months ago
A High Swing Low Power CMOS Differential Voltage-Controlled Ring Oscillator
This paper presents a two-stage CMOS differential voltage-controlled ring oscillator (VCO). The VCO is intended to operate as a frequency synthesizer in a PLL to generate local os...
Luciano Severino de Paula, Eric E. Fabris, Sergio ...
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
13 years 11 months ago
Low Static-Power Frequent-Value Data Caches
: Static energy dissipation in cache memories will constitute an increasingly larger portion of total microprocessor energy dissipation due to nanoscale technology characteristics ...
Chuanjun Zhang, Jun Yang 0002, Frank Vahid
IPPS
2003
IEEE
14 years 27 days ago
A Novel Design Technology for Next Generation Ubiquitous Computing Architecture
Modern applications for mobile computing require high performance architectures. On the other hand, there are restrictions such as storage or power consumption. The use of reconï¬...
Carsten Nitsch, Camillo Lara, Udo Kebschull