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» Overview on Low Power SoC Design Technology
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ANCS
2009
ACM
13 years 5 months ago
Design of a scalable nanophotonic interconnect for future multicores
As communication-centric computing paradigm gathers momentum due to increased wire delays and excess power dissipation with technology scaling, researchers have focused their atte...
Avinash Karanth Kodi, Randy Morris
CF
2011
ACM
12 years 7 months ago
Hybrid high-performance low-power and ultra-low energy reliable caches
Ubiquitous computing has become a very popular paradigm. The most suitable technological solution for those systems consists of using hybrid processors able to operate at high vol...
Bojan Maric, Jaume Abella, Francisco J. Cazorla, M...
ISCAS
2007
IEEE
158views Hardware» more  ISCAS 2007»
14 years 1 months ago
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
José C. García, Juan A. Montiel-Nels...
ASPDAC
2006
ACM
104views Hardware» more  ASPDAC 2006»
13 years 11 months ago
SAVS: a self-adaptive variable supply-voltage technique for process- tolerant and power-efficient multi-issue superscalar proces
- Technology scaling and sub-wavelength optical lithography is associated with significant process variations. We propose a self-adaptive variable supply-voltage scaling (SAVS) tec...
Hai Li, Yiran Chen, Kaushik Roy, Cheng-Kok Koh
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...