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» Overview on Low Power SoC Design Technology
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ISVLSI
2008
IEEE
158views VLSI» more  ISVLSI 2008»
14 years 1 months ago
Improving Energy Efficiency of Configurable Caches via Temperature-Aware Configuration Selection
Active power used to be the primary contributor to total power dissipation of CMOS designs, but with the technology scaling, the share of leakage in total power consumption of dig...
Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki ...
ICMENS
2005
IEEE
97views Hardware» more  ICMENS 2005»
14 years 1 months ago
A Parametric Study of Thermal Effects on the Reliability of RF MEMS Switches
The influence of thermal effects on the reliability of RF MEMS switches is investigated in this paper. Low power consumption and capacity to handle high power at very high frequen...
Jonathan Lueke, Noor Al Quddus, Walied A. Moussa, ...
CASES
2007
ACM
13 years 11 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
ISQED
2003
IEEE
121views Hardware» more  ISQED 2003»
14 years 22 days ago
Monolithic DC-DC Converter Analysis And Mosfet Gate Voltage Optimization
— The design of an efficient monolithic buck converter is presented in this paper. A low swing MOSFET gate drive technique is proposed that improves the efficiency characteristic...
Volkan Kursun, Siva Narendra, Vivek De, Eby G. Fri...
ASPDAC
2004
ACM
130views Hardware» more  ASPDAC 2004»
14 years 27 days ago
Automatic process migration of datapath hard IP libraries
— While essential for high-performance circuit design, the custom nature of datapath components confines their use in only a few microprocessor companies. The reusability of dat...
Fang Fang, Jianwen Zhu