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HPCA
1996
IEEE
13 years 11 months ago
Improving Release-Consistent Shared Virtual Memory Using Automatic Update
Shared virtual memory is a software technique to provide shared memory on a network of computers without special hardware support. Although several relaxed consistency models and ...
Liviu Iftode, Cezary Dubnicki, Edward W. Felten, K...
ISSS
2000
IEEE
91views Hardware» more  ISSS 2000»
14 years 1 days ago
Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral Cores
Various system-level core-based power evaluation approaches for core types like microprocessors, caches, main memories, and buses, have been proposed in the past. Approaches for o...
Tony Givargis, Frank Vahid, Jörg Henkel
PSTV
1993
123views Hardware» more  PSTV 1993»
13 years 9 months ago
On the Verification of Temporal Properties
We present a new algorithm that can be used for solving the model−checking problem for linear−time temporal logic. This algorithm can be viewed as the combination of two exist...
Patrice Godefroid, Gerard J. Holzmann
PSTV
1992
113views Hardware» more  PSTV 1992»
13 years 8 months ago
Coverage Preserving Reduction Strategies for Reachability Analysis
We study the effect of three new reduction strategies for conventional reachability analysis, as used in automated protocol validation algorithms. The first two strategies are imp...
Gerard J. Holzmann, Patrice Godefroid, Didier Piro...
MICRO
2002
IEEE
164views Hardware» more  MICRO 2002»
14 years 17 days ago
A quantitative framework for automated pre-execution thread selection
Pre-execution attacks cache misses for which conventional address-prediction driven prefetching is ineffective. In pre-execution, copies of cache miss computations are isolated fr...
Amir Roth, Gurindar S. Sohi