138 search results - page 3 / 28 » PADded Cache: A New Fault-Tolerance Technique for Cache Memo... |
ISCA
1999
IEEE
13 years 12 months ago
1999
IEEE
Information integrity in cache memories is a fundamental requirement for dependable computing. Conventional architectures for enhancing cache reliability using check codes make it...
RTSS
2003
IEEE
14 years 27 days ago
2003
IEEE
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
It is widely accepted that transient failures will appear more frequently in chips designed in the near future due to several factors such as the increased integration scale. On t...
DSD
2007
IEEE
13 years 11 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
DATE
2004
IEEE
13 years 11 months ago
2004
IEEE
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...