138 search results - page 7 / 28 » PADded Cache: A New Fault-Tolerance Technique for Cache Memo... |
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
Abstract— In an effort to make processors more power efficient scratch pad memory (SPM) have been proposed instead of caches, which can consume majority of processor power. Howe...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
Many multi-core processors employ a large last-level cache (LLC) shared among the multiple cores. Past research has demonstrated that sharing-oblivious cache management policies (...
IWSOC
2003
IEEE
14 years 28 days ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
SPAA
2006
ACM
14 years 1 months ago
2006
ACM
We present a technique for analyzing the number of cache misses incurred by multithreaded cache oblivious algorithms on an idealized parallel machine in which each processor has a...
ISCA
2002
IEEE
14 years 17 days ago
2002
IEEE
Techniques for analyzing and improving memory referencing behavior continue to be important for achieving good overall program performance due to the ever-increasing performance g...