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» PAPER - Accelerating parallel evaluations of ROCS
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MICRO
2007
IEEE
137views Hardware» more  MICRO 2007»
15 years 10 months ago
Implementing Signatures for Transactional Memory
Transactional Memory (TM) systems must track the read and write sets—items read and written during a transaction—to detect conflicts among concurrent transactions. Several TM...
Daniel Sanchez, Luke Yen, Mark D. Hill, Karthikeya...
MICRO
2006
IEEE
135views Hardware» more  MICRO 2006»
15 years 10 months ago
Support for High-Frequency Streaming in CMPs
As the industry moves toward larger-scale chip multiprocessors, the need to parallelize applications grows. High inter-thread communication delays, exacerbated by over-stressed hi...
Ram Rangan, Neil Vachharajani, Adam Stoler, Guilhe...
AIRS
2004
Springer
15 years 9 months ago
Multilingual Relevant Sentence Detection Using Reference Corpus
IR with reference corpus is one approach when dealing with relevant sentences detection, which takes the result of IR as the representation of query (sentence). Lack of informatio...
Ming-Hung Hsu, Ming-Feng Tsai, Hsin-Hsi Chen
ICDCS
2002
IEEE
15 years 9 months ago
A Practical Approach for ?Zero? Downtime in an Operational Information System
An Operational Information System (OIS) supports a real-time view of an organization’s information critical to its logistical business operations. A central component of an OIS ...
Ada Gavrilovska, Karsten Schwan, Van Oleson
MICRO
1998
IEEE
79views Hardware» more  MICRO 1998»
15 years 8 months ago
Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
David López, Josep Llosa, Mateo Valero, Edu...