223 search results - page 13 / 45 » POWER4 system microarchitecture |
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
Moore’s Law will soon deliver tera-scale level transistor integration capacity. Power, variability, reliability, aging, and testing will pose as barriers and challenges to harne...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Single-thread performance, reliability and power efficiency are critical design challenges of future multicore systems. Although point solutions have been proposed to address thes...
ISCA
2012
IEEE
11 years 10 months ago
2012
IEEE
There have been many attacks that exploit side-effects of program execution to expose secret information and many proposed countermeasures to protect against these attacks. Howeve...
MICRO
2002
IEEE
14 years 14 days ago
2002
IEEE
With the prevalence of server blades and systems-ona-chip (SoCs), interconnection networks are becoming an important part of the microprocessor landscape. However, there is limite...
CSE
2011
IEEE
12 years 7 months ago
2011
IEEE
In this paper, we present a performance modeling framework based on memory bandwidth contention time and a parameterized communication model to predict the performance of OpenMP, M...