230 search results - page 20 / 46 » PPM Reduction on Embedded Memories in System on Chip |
ACSAC
2008
IEEE
14 years 2 months ago
2008
IEEE
Main memory contains transient information for all resident applications. However, if memory chip contents survives power-off, e.g., via freezing DRAM chips, sensitive data such a...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
This paper proposes a combination of circuit and architectural techniques to maximize leakage power reduction in embedded processor on-chip caches. It targets cache peripheral cir...
TCAD
2010
13 years 2 months ago
2010
Abstract--This paper presents a GALS-compatible circuitswitched on-chip network that is well suited for use in many-core platforms targeting streaming DSP and embedded applications...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...
SIES
2008
IEEE
14 years 1 months ago
2008
IEEE
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...