230 search results - page 4 / 46 » PPM Reduction on Embedded Memories in System on Chip |
HIPEAC
2005
Springer
14 years 1 months ago
2005
Springer
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
IJPP
2007
13 years 7 months ago
2007
MTDT
2003
IEEE
14 years 22 days ago
2003
IEEE
Memory cores (especially SRAM cores) used on a system chip usually come from a memory compiler. Commercial memory compilers have their limitation— a large memory may need to be ...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
The increasing complexity and the short life cycles of embedded systems are pushing the current system-onchip designs towards a rapid increasing on the number of programmable proc...
MICRO
1997
IEEE
13 years 11 months ago
1997
IEEE
Most modern microprocessors employ one or two levels of on-chip caches in order to improve performance. These caches are typically implemented with static RAM cells and often occu...