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» Parallel Algorithms for Balanced Truncation Model Reduction ...
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ASPDAC
1999
ACM
144views Hardware» more  ASPDAC 1999»
13 years 11 months ago
Model Order Reduction of Large Circuits Using Balanced Truncation
A method is introduced for model order reduction of large circuits extracted from layout. The algorithm, which is based on balanced realization, can be used for reducing the order ...
Payam Rabiei, Massoud Pedram
DAC
2007
ACM
13 years 11 months ago
SBPOR: Second-Order Balanced Truncation for Passive Order Reduction of RLC Circuits
RLC circuits have been shown to be better formulated as second-order systems instead of first-order systems. The corresponding model order reduction techniques for secondorder sys...
Boyuan Yan, Sheldon X.-D. Tan, Pu Liu, Bruce McGau...
SIAMSC
2008
131views more  SIAMSC 2008»
13 years 7 months ago
Gramian-Based Model Reduction for Data-Sparse Systems
Model order reduction (MOR) is common in simulation, control and optimization of complex dynamical systems arising in modeling of physical processes and in the spatial discretizati...
Ulrike Baur, Peter Benner
DAC
2002
ACM
14 years 8 months ago
Guaranteed passive balancing transformations for model order reduction
The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient generation of the mod...
Joel R. Phillips, Luca Daniel, Luis Miguel Silveir...
DAC
2003
ACM
14 years 8 months ago
A TBR-based trajectory piecewise-linear algorithm for generating accurate low-order models for nonlinear analog circuits and MEM
In this paper we propose a method for generating reduced models for a class of nonlinear dynamical systems, based on truncated balanced realization (TBR) algorithm and a recently ...
Dmitry Vasilyev, Michal Rewienski, Jacob White