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VLSID
2004
IEEE
107views VLSI» more  VLSID 2004»
14 years 9 months ago
Performance Analysis of Inter Cluster Communication Methods in VLIW Architecture
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
Sourabh Saluja, Anshul Kumar
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
14 years 4 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
IEEEPACT
2008
IEEE
14 years 3 months ago
Exploiting loop-dependent stream reuse for stream processors
The memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory acc...
Xuejun Yang, Ying Zhang, Jingling Xue, Ian Rogers,...
SIPS
2008
IEEE
14 years 3 months ago
Efficient mapping of advanced signal processing algorithms on multi-processor architectures
Modern microprocessor technology is migrating from simply increasing clock speeds on a single processor to placing multiple processors on a die to increase throughput and power pe...
Bhavana B. Manjunath, Aaron S. Williams, Chaitali ...
COLCOM
2007
IEEE
14 years 3 months ago
Kademlia for data storage and retrieval in enterprise networks
— Centralized organization of current enterprise networks doesn’t represent an ideal solution in terms of information security and reliability. Denial of service, packet filter...
Natalya Fedotova, Stefano Fanti, Luca Veltri