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» Parallel Computing with FPGAs - Concepts and Applications
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ISCA
2006
IEEE
154views Hardware» more  ISCA 2006»
14 years 1 months ago
SODA: A Low-power Architecture For Software Radio
The physical layer of most wireless protocols is traditionally implemented in custom hardware to satisfy the heavy computational requirements while keeping power consumption to a ...
Yuan Lin, Hyunseok Lee, Mark Woh, Yoav Harel, Scot...
ANCS
2005
ACM
14 years 1 months ago
SSA: a power and memory efficient scheme to multi-match packet classification
New network applications like intrusion detection systems and packet-level accounting require multi-match packet classification, where all matching filters need to be reported. Te...
Fang Yu, T. V. Lakshman, Martin Austin Motoyama, R...
ICMI
2005
Springer
164views Biometrics» more  ICMI 2005»
14 years 1 months ago
A user interface framework for multimodal VR interactions
This article presents a User Interface (UI) framework for multimodal interactions targeted at immersive virtual environments. Its configurable input and gesture processing compon...
Marc Erich Latoschik
WMPI
2004
ACM
14 years 27 days ago
The Opie compiler from row-major source to Morton-ordered matrices
The Opie Project aims to develop a compiler to transform C codes written for row-major matrix representation into equivalent codes for Morton-order matrix representation, and to a...
Steven T. Gabriel, David S. Wise
DAC
2010
ACM
13 years 11 months ago
Off-chip memory bandwidth minimization through cache partitioning for multi-core platforms
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
Chenjie Yu, Peter Petrov
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