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119
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DATE
2008
IEEE
153views Hardware» more  DATE 2008»
15 years 9 months ago
An Optimized Message Passing Framework for Parallel Implementation of Signal Processing Applications
Novel reconfigurable computing platforms enable efficient realizations of complex signal processing applications by allowing exploitation of parallelization resulting in high thro...
Sankalita Saha, Jason Schlessman, Sebastian Puthen...
MICRO
2005
IEEE
130views Hardware» more  MICRO 2005»
15 years 8 months ago
Exploiting Vector Parallelism in Software Pipelined Loops
An emerging trend in processor design is the addition of short vector instructions to general-purpose and embedded ISAs. Frequently, these extensions are employed using traditiona...
Samuel Larsen, Rodric M. Rabbah, Saman P. Amarasin...
140
Voted
JAVA
2001
Springer
15 years 7 months ago
A scalable, robust network for parallel computing
CX, a network-based computational exchange, is presented. The system’s design integrates variations of ideas from other researchers, such as work stealing, non-blocking tasks, e...
Peter R. Cappello, Dimitros Mourloukos
TPDS
2010
174views more  TPDS 2010»
15 years 29 days ago
Parallel Two-Sided Matrix Reduction to Band Bidiagonal Form on Multicore Architectures
The objective of this paper is to extend, in the context of multicore architectures, the concepts of tile algorithms [Buttari et al., 2007] for Cholesky, LU, QR factorizations to t...
Hatem Ltaief, Jakub Kurzak, Jack Dongarra
125
Voted
DAC
2002
ACM
16 years 3 months ago
Exploiting operation level parallelism through dynamically reconfigurable datapaths
Increasing non-recurring engineering (NRE) and mask costs are making it harder to turn to hardwired Application Specific Integrated Circuit (ASIC) solutions for high performance a...
Zhining Huang, Sharad Malik