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DATE
2002
IEEE
89views Hardware» more  DATE 2002»
14 years 3 months ago
A Hierarchical Test Scheme for System-On-Chip Designs
System-on-chip (SOC) design methodology is becoming the trend in the IC industry. Integrating reusable cores from multiple sources is essential in SOC design, and different design...
Jin-Fu Li, Hsin-Jung Huang, Jeng-Bin Chen, Chih-Pi...
DSD
2002
IEEE
110views Hardware» more  DSD 2002»
14 years 3 months ago
A Design for a Low-Power Digital Matched Filter Applicable to W-CDMA
This paper presents a design for a low-power digital matched filter (DMF) applicable to Wideband-Code Division Multiple Access (W-CDMA), which is a Direct-Sequence Spread-Spectrum...
Shoji Goto, Takashi Yamada, Norihisa Takayarna, Yo...
ICPP
2002
IEEE
14 years 3 months ago
Optimal Code Size Reduction for Software-Pipelined Loops on DSP Applications
Code size expansion of software-pipelined loops is a critical problem for DSP systems with strict code size constraint. Some ad-hoc code size reduction techniques were used to try...
Qingfeng Zhuge, Zili Shao, Edwin Hsing-Mean Sha
ICPPW
2002
IEEE
14 years 3 months ago
Statistical Analysis of Connectivity in Unidirectional Ad Hoc Networks
A unidirectional link exists in an ad-hoc network when a node B is within the transmission range of another node A while node A cannot directly hear node B. However, a reverse rou...
Venugopalan Ramasubramanian, Daniel Mossé
ISCAS
2002
IEEE
111views Hardware» more  ISCAS 2002»
14 years 3 months ago
CASCADE - configurable and scalable DSP environment
As the complexity of embedded systems grows rapidly, it is common to accelerate critical tasks with hardware. Designers usually use off-the-shelf components or licensed IP cores t...
Tay-Jyi Lin, Chein-Wei Jen