657 search results - page 60 / 132 » Parallel Parameter Tuning for Applications with Performance ... |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
We propose an interconnect reorganization algorithm for reduction stages in parallel multipliers. It aims at minimizing power consumption for given static probabilities at the pri...
HPCA
2003
IEEE
14 years 8 months ago
2003
IEEE
Increasing focus on power dissipation issues in current microprocessors has led to a host of proposals for clock gating and other power-saving techniques. While generally effectiv...
SASP
2009
IEEE
14 years 2 months ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
GRID
2003
Springer
14 years 27 days ago
2003
Springer
In previous work we have presented the ZENTURIO experiment management system for performance and parameter studies of parallel and distributed applications on cluster and Grid arc...
DCOSS
2005
Springer
14 years 1 months ago
2005
Springer
In surveillance and tracking applications, wireless sensor nodes collectively monitor the existence of intruding targets. In this paper, we derive closed form results for predicti...